1. Field of the Invention
The present invention relates to a semiconductor device manufacturing method.
2. Description of the Related Art
Semiconductor devices such as CMOS""s are normally manufactured by utilizing the SOI (silicon-on-insulator) substrate technology in the prior art.
FIGS. 2(a)xcx9c2(e) are sectional views of steps taken in a manufacturing method for manufacturing semiconductor devices that adopts the SOI substrate technology in the prior art.
First, a single crystal silicon layer 13 is formed on an embedded silicon oxide film 12 formed on a silicon substrate 11. Then, a thermal oxide film 14 is formed at the surface of the single crystal silicon layer 13. Next, a silicon nitride film is formed on the thermal oxide film 14. Subsequently, the silicon nitride film is selectively removed in a dry etching process implemented through photolithography so that a silicon nitride film 15 is left over an area which is to form an active area to be detailed later, as shown in FIG. 2(a).
Next, with the silicon nitride film 15 used as a mask, the single crystal silicon layer 13 undergoes selective thermal oxidation so as to form an oxide film 16 and an active area 17 as shown in FIG. 2(b). The active area 17 is an area over which an nMOS transistor or a pMOS transistor is to be formed. Then, as illustrated in FIG. 2(c), the silicon nitride film 15 is removed.
Next, a photoresist film is formed over the entire surface. The photoresist film is then selectively removed in an etching process implemented through photolithography and, as a result, only a photoresist layer 18 is left unremoved over the active area 17, as illustrated in FIG. 2(d). The position and the dimensions of the photoresist layer 18 are adjusted so as to ensure that it does not cover the edges at the sides of the active area 17. Then, by using the photoresist layer 18 as a mask, ions of an impurity are implanted at the edges at the sides of the active area 17 to form an impurity layer 19.
Next, the photoresist layer 18 is removed, and then ions of an impurity are implanted over the entire active area 17 to adjust the threshold value. In the following step, after forming a gate oxide film 20 and a gate polysilicon film 21 as illustrated in FIG. 2(e), a gate is formed by patterning the gate polysilicon film 21.
As a result, an nMOS transistor or a pMOS transistor is formed.
As described above, the impurity layer 19 is formed by implanting ions of an impurity at the edges at the sides of the active area 17 in the semiconductor device manufacturing method in the prior art. Thus, the parasitic transistor phenomenon and the edge transistor phenomenon are prevented from occurring along the edges at the sides of the active area 17, and the method is therefore free of problems such as reduced threshold voltage and hump characteristics.
However, the dimensions of the photoresist layer 18 used as a mask during the process of implanting ions of the impurity at the edges at the sides of the active area 17 must be set smaller than the dimensions of the active area 17 when forming an extremely small active area 17 to achieve miniaturization of the semiconductor device in the semiconductor device manufacturing method in the prior art.
The silicon nitride film 15 and the photoresist layer 18 used as masks when forming the active area 17 are patterned in an etching process implemented through photolithography. If the active area 17 is formed in the smallest possible size that allows a photolithography process to be implemented, it is not possible to pattern the photoresist layer 18, the dimensions of which are smaller than the dimensions of the active area 17. As a result, the impurity layer 19 cannot be formed by implanting ions of the impurity at the edges at the sides of the active area 17. Consequently, the occurrence of the parasitic transistor phenomenon or the edge transistor phenomenon along the edges at the sides of the active area 17 cannot be prevented and problems such as reduced threshold voltage and hump characteristics arise.
An object of the present invention is to provide a semiconductor device manufacturing method through which an impurity layer can be formed by implanting ions of an impurity at the edges at the sides of an active area formed in the smallest possible size, the occurrence of the parasitic transistor phenomenon or the edge transistor phenomenon along the edges of the sides of the active area can be prevented and problems such as reduced threshold voltage and hump characteristics can be prevented by addressing the problem discussed above.
Accordingly, in a semiconductor device manufacturing method according to the present invention, a shielding layer is selectively formed on a single crystal silicon layer, an active area is formed in the single crystal silicon layer by using the shielding layer as a mask and an impurity layer is formed at the edges at the sides of the active area by using the shielding layer as a mask and implanting an impurity diagonally from above.
In another semiconductor device manufacturing method according to the present invention, a first shielding layer is selectively formed on a single crystal silicon layer, an active area is formed in the single crystal silicon layer by using the first shielding layer as a mask, the first shielding layer is removed, a second shielding layer is selectively formed on the active area, the size of which is reduced and an impurity layer is formed at the edges at the sides of the active area by implanting an impurity with the reduced second shielding layer used as a mask.
In yet another semiconductor device manufacturing method according to the present invention, a shielding layer is selectively formed on a single crystal silicon layer, an active area is formed in the single crystal silicon layer by using the shielding layer as a mask, an impurity-containing layer which is in contact with the sides of the active area formed and an impurity layer is formed at the edges at the sides of the active area by diffusing the impurity from the impurity-containing layer.